High-voltage, field-effect transistors (HVFETs) and other varieties of high voltage power semiconductor devices are well known in the semiconductor arts. Many HVFETs employ a device structure that includes a lightly-doped extended drain region that supports or blocks the applied high-voltage (e.g., several hundred volts) when the device is in the “off” state. Because of the high-resistivity epitaxial layer, the “on” state drain-source resistances (RDS(on)) of ordinary MOSFET power devices operating at high voltages (e.g., 500-700V or higher) is typically large, especially at high drain currents. For instance, in a traditional power MOSFET the lightly-doped extended drain region, also referred to as the drift zone, is typically responsible for 95% of total on-state resistance of the transistor.
To combat the conduction loss problem, various alternative design structures have been proposed. For example, in the vertical, thin silicon (VTS) MOSFET the conduction loss is lowered by employing a graded doping profile in a thin silicon layer which is depleted by a field plate embedded in an adjacently located thick oxide. One problem with the VTS structure, however, is the relatively large output capacitance (Coss) caused by the large field plate (coupled to the source terminal) to silicon pillar (coupled to the drain terminal) overlap. This relatively large output capacitance limits the high frequency switching performance of the device. Another drawback to the traditional VTS MOSFET structure is the need for a linearly-graded doping profile in the vertical direction through the drift regions, which is often difficult to control and costly to manufacture.
In another approach, known as the CoolMOS™ concept, conduction loss is reduced by alternating N− and P− reduced surface field (RESURF) layers. In a CoolMOS™ device electrical conductivity is provided by majority carriers only; that is, there is no bipolar current (minority carrier) contribution. Due to the fact that the CoolMOS™ high-voltage power MOSFET design does not include a large trench field plate structure, it also benefits from a relatively low Coss. Nevertheless, in certain applications the CoolMOS™ design still suffers from unacceptably high conductivity losses.
The insulated-gate bipolar transistor, or IGBT, is a minority carrier power semiconductor device that achieves relatively low conduction losses through a FET control input in combination with a bipolar power switching transistor in a single device structure. The main drawback of the IGBT design, however is that switching frequency is typically limited to 60 KHz or lower due to a characteristic “tail current” resulting from minority carrier buildup in the epitaxial drift region. Stated differently, switching losses caused by poor switching performance at higher frequencies (100 KHz or higher) remains problematic. Attempts aimed at improving the switching speed of the IGBT design include the use of ultra-thin wafer (˜75 μm or less) non-punchthrough structures. But ultra-thin wafer processing comes with significant cost addition and added complexity in fabrication processing.